1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a method for manufacturing a semiconductor device including a step for forming a wiring structure on a substrate.
2. Background Art
Concurrent with the higher integration and miniaturization of semiconductor devices, the reduction of RC delay has been particularly demanded. To cope with this problem, it is considered to use a material having a low resistivity as the material for wirings, and a low-k material having a low dielectric constant as the material for insulating films.
As materials having a low resistivity, the application of Cu or Cu alloys is presently examined. Since Cu has about 35% lower resistivity than Al, which has been used as a material for wirings, and has a high resistance to electromigration, Cu is expected as a material for highly reliable wirings in higher integrated semiconductor devices.
The micro-fabrication of Cu to wiring forms is difficult by etching such as RIE (reactive ion etching), that has been used in the formation of conventional Al wirings and the like. Therefore, a damascene method, wherein Cu is filled in a base film having an opening formed therein, is used as a method for forming Cu wirings, and above all, the dual damascene method for simultaneously forming wirings and via portions has prevailed.
When wirings and via holes are formed using the dual damascene method, specifically, the process starts from forming a barrier metal such as TaN on a base substrate having an opening. Then, a Cu seed film is formed as a seed layer for electrolytic plating, and Cu is filled in via holes using electrolytic plating. Thereafter, the surface is planarized using CMP (chemical mechanical polishing) Thereby, Cu wirings and via plugs formed of Cu are simultaneously formed.
The reason for using the barrier metal is to prevent the diffusion of Cu in the insulating film.
On the other hand, as a low-dielectric-constant (low-k) insulating film, an insulating film having a specific dielectric constant, k, of less than 3.0 has been studied. The examples of materials for such low-k insulating films include polysiloxane, HSQ (hydrogensilsesquioxane), polymethylsiloxane, and MSQ (methyl silsesquioxane). Among these, polymethylsiloxane, MSQ and the like, which have high resistance to heating and processing, are widely used.
The use of a porous insulating film having a specific dielectric constant smaller than about 2.5 is also studied. The porous insulating film has pores of a diameter of several to several tens of angstroms in a low-k film as described above.
However, since a porous insulating film has pores in the film, it has a lower density than ordinary insulating films. Therefore, the porous insulating film is more likely to be damaged than ordinary insulating films, because particles such as plasma, or detergents penetrate deep into the film in the following etching and ashing steps for forming the openings or for processing wirings. If a barrier metal or Cu wiring is formed on such a damaged porous insulating film, the barrier properties have lowered, and the diffusion of Cu is increased. The diffusion of Cu is considered to lead to the degradation of the device performance of the semiconductor device.